Abstract:In order to decrease the hardware complexity of DWT further

an efficient hardware structure for DWT derived from flipping scheme was proposed. The precision of hardware structure had been analyzed

moreover

dynamic range and number of binary factional bit had been obtained. The structure merged the lifting step and adopted the pipelined design to combine predictor step and updater step into one single lifting step

and adjust the primitive data path effectively. The structure introduced 2 to 1 multiplexers into scaling step. Experimental results shown that the proposed structure

under the tight critical path

could effectively reduce the quantity of multipliers

adders and internal registers

and make full use of the arithmetic resources.